What in-memory compute really is

The fastest way to move data is to not move it.

Almost every computer ever built separates two things: memory, where data lives, and a processor, where data is worked on. Every operation ferries data between them. John von Neumann described the design in 1945; the gap between memory and compute has been called the von Neumann bottleneck ever since.

For decades the bottleneck was about speed. For AI inference it has become about energy. A neural network is mostly one operation — multiply a vector of inputs by a matrix of weights, then sum — repeated billions of times. The weights are large and must be fetched from memory at every step. The fetching, not the maths, is where the energy goes.

Computing in the array

In-memory compute removes the trip. Instead of fetching weights to a processor, it performs the computation inside the memory itself.

Phynomy stores each weight as a physical resistance in an RRAM crossbar — a grid of wires with a memristor at every junction. Apply input voltages along the rows and physics does the arithmetic: Ohm's law turns each voltage across each resistance into a current (the multiply), and Kirchhoff's law sums the currents down each column (the add). The matrix-vector multiply a GPU runs in software happens here as a property of the circuit — no fetch, no bus, effectively no weight movement.

Why it's possible now

The idea is old; the engineering is recent. It took working memristive devices with a stable, modelled resistance — and the ability to fabricate and measure real crossbar arrays, not just simulate them. Phynomy's core device is a dual-doped TiO₂ memristor with a full SPICE model and a granted patent, and crossbar arrays have been built and characterised in hardware. Independent research on the same class of architecture has reported order-of-magnitude efficiency gains. The bottleneck eighty years in the making is, finally, optional.